Predictability and Performance Enhancement for Real-Time Embedded Systems by Cache-Locking

In real-time systems, cache memory poses challenge to improve both predictability and performance because of its adaptive and dynamic behavior. Recent studies indicate that for application-specific embedded systems, static cache-locking helps determining the worst case execution time (WCET) and cache-related preemption delay. In this work, we propose a static instruction cachelocking algorithm that makes the real-time embedded system more predictable by locking the blocks that might cause more cache misses. We obtain CPU utilization for both static cache analysis (no cache-locking) and static cache-locking using Heptane. Experimental results show that our cache-locking algorithm may improve both predictability and performance of real-time systems. Index Terms — Predictability, performance, cachelocking, real-time embedded system, Heptane.